The present invention pertains to methods and apparatus for electroplating metal onto a work piece. More specifically, the invention pertains to methods and apparatus for controlling the electrical resistance and current flow characteristics in an electrolyte environment encountered by the work piece during electroplating.
The first generation of integrated circuits that used copper as the IC level interconnecting technology was introduced by IBM in 1997. The transition from aluminum to copper required a change in process xe2x80x9carchitecturexe2x80x9d (to damascene and dual-damascene) as well as new process technologies. Two processes used in producing copper damascene circuits are the formation of a xe2x80x9cseed-xe2x80x9d or xe2x80x9cstrike-xe2x80x9d layer, which is then used as a base layer onto which copper is electroplated (xe2x80x9celectrofillxe2x80x9d).
A seed layer is typically a thin conductive metal (e.g. copper) film (conventionally about 1250 xc3x85 thick). The seed layer is separated from the insulating dielectric (e.g silicon oxide) by a barrier layer so that copper inlay thereon does not diffuse into the dilelectric. The seed layer carries an electrical plating current from the edge of the wafer (where electrical contact is typically made) to all trench and via structures located across the wafer surface. Ideally, the seed layer should be conformal and continuous over and into all such features and have minimal closure or xe2x80x9cneckingxe2x80x9d at the top of the embedded features. The demand for increasingly smaller device features, there is a concomitant need for correspondingly thinner seed layers to prevent necking. It is anticipated that in the near future, seed thickness will decrease to 500 xc3x85 and may eventually decrease to as little as 100 xc3x85.
As seed layer thickness decreases, the ability to electroplate with a high degree of uniformity becomes more problematic. One problem is the resistance of the seed layer. The use of larger wafer diameters, exacerbates this problem, because the plating current must traverse an even larger distance through the seed layer. The seed layer initially has a significant resistance radially from the edge to the center of the wafer because the seed layer is initially very thin. This resistance causes a corresponding potential drop from the edge where electrical contact is made to the center of the wafer. These effects are reported in L. A. Gochberg, xe2x80x9cModeling of Uniformity and 300-mm Scale-up in a Copper Electroplating Toolxe2x80x9d, Proceedings of the Electrochemical Society (Fall 1999, Honolulu Hi.); and E. K. Broadbent, E. J. Mclnerney, L. C. Gochberg, and R. L. Jackson, xe2x80x9cExperimental and Analytical Study of Seed Layer Resistance for Copper Damascene Electroplatingxe2x80x9d, Vac. Sci. and Technol. B17, 2584 (November/December 1999). Thus, the seed layer has a non-uniform initial potential that is more negative at the edge of the wafer. The associated deposition rate tends to be greater at the wafer edge relative to the interior of the wafer. This effect is known as the xe2x80x9cterminal effect.xe2x80x9d Terminal effect resistance losses are common, and they vary with time during a plating process.
Another variable that adds to the complexity of the issue is non-uniformity in the seed layer across a wafer surface. Seed layer non-uniformity imparts resistance variation across the wafer. Yet another variable is feature aspect ratio and feature density. Having a high-density of features, especially those with high aspect ratios, causes significant variation in seed layer resistance across a wafer. These issues demand improvements in hardware and processes to maintain uniform plating when thin seed layers are used to initiate electroplating. Asymmetrical shielding elements have been examined as a way to change (tailor) the composite plating process uniformity. The change in plating current was estimated as the time averaged exposure that a rotating wafer would xe2x80x9cseexe2x80x9d with a mask of a certain shape and size covering the part during a rotational period. This work is described in U.S. Pat. No. 6,027,631, entitled xe2x80x9cElectroplating System with Shields for Various Thickness Profile of Deposited Layerxe2x80x9d, by Broadbent, et al., which is herein incorporated by reference for all purposes.
Jorne et al., U.S. Pat. No. 6,132,587, describes various methods of mitigating the terminal effect. Methods to improve the uniformity of metal electroplating over the entire wafer included: increasing the resistance of the electrolyte, increasing the distance between the wafer and the anode, increasing the thickness of the seed layer, increasing the ionic resistance of a porous separator placed between the wafer and the anode, placement of a rotating distributor in front of the wafer, and establishing contacts at the center of the wafer. As well, they describe a method that uses a xe2x80x9crotating distributor jetxe2x80x9d that directs varying amounts of electrolyte flow to different radii of a wafer. This method is not particularly useful because plating conditions (flow rate, replenishment of additives, etc.) vary locally and therefore create a convolution between electrofilling and uniformity. Additionally, no simple means of varying the uniformity with respect to process time is presented.
While the approaches discussed above have proven useful, they suffer a number of potential limitations. Such limitations include the inability to continuously change (throughout a plating process) the resistance compensation, the high cost of implementation, and mechanical limitations (e.g. a large number of moving part in a corrosive bath, material compatibility limitations, and reliability).
What is needed therefore, are improved apparatus and methods for uniform electroplating onto thin-metal seeded wafers, particularly wafers with large diameters (e.g. 300 mm).
The present invention pertains to methods and apparatus for electroplating a substantially uniform layer of a metal onto a work piece having a seed layer thereon. The total current of a plating cell is distributed among a plurality of anodes in the plating cell in order to tailor the current distribution in the plating electrolyte to compensate for resistance and voltage variation across a work piece due to the seed layer. Focusing elements are used to create xe2x80x9cvirtual anodesxe2x80x9d in proximity to the plating surface of the work piece to further control the current distribution in the electrolyte during plating.
One aspect of the invention is a method for electroplating a substantially uniform layer of a metal onto a work piece having a seed layer thereon. Such methods may be characterized by the following operations: (a) immersing at least that portion of the work piece having the seed layer thereon in an electrolyte, the electrolyte containing ions of the metal; and (b) passing a current between the seed layer and a plurality of anodes whereby the current is distributed among the plurality of anodes such that, for any instance in time during plating, the metal is deposited substantially uniformly onto the entire surface area of the seed layer.
Semiconductor wafers are one such work piece. Preferably the entire surface area of the seed layer consists of an inner and an outer region. In one example, the inner region is a circular surface area, the center of the circular surface area coincident with the center of the wafer. The outer region is an annular surface area defined by an outer circle, substantially coincident with the outermost edge of the wafer, and an inner circle of the same diameter as the inner region. Preferably, the inner region includes between about 15 and 25 percent of the surface area of the seed layer, the outer region covering the remainder of the surface area of the seed layer.
In one example, distributing the current between a plurality of anodes means distributing the current between an inner anode, proximate to the inner region, and an outer anode, proximate to the outer region. For example, when electroplating metal onto a wafer with a thin seed layer (where electrical contact is made at the wafer edge), the plating current is distributed between the inner and outer anode to compensate for the terminal effect. For example, a larger percentage of the total plating current of a cell is applied to the inner anode in order to overcome initial higher electrical resistance levels in the inner region (vs. in the outer region). As the plated layer thickens and terminal effect is ameliorated, the relative ratio of current applied to the inner vs. the outer anode is decreased in order to more evenly distribute the current in the electrolyte proximate the inner vs. outer regions. Thus according to the above method, (b) includes: i. distributing the current between a first anode, the first anode proximate an inner region of the seed layer, and a second anode, the second anode proximate an outer region of the seed layer, such that the inner region is exposed to a larger fraction of the resultant current per unit area than the outer region during an initial stage of plating; and, ii. redistributing the current between the first and second anodes toward a distribution that corresponds substantially to the ratio of the work surface areas of the first and second anode or work surface areas of any corresponding virtual anodes (described below) for each of the first and the second anodes. Preferably the work surface areas of each of the first and second anodes and/or the work surfaces of any corresponding virtual anodes for each of the first and the second anodes correspond substantially to the areas of the inner and outer regions of the seed layer, respectively.
As mentioned, methods of the invention may include using one or more focusing elements to enhance the current distribution in the electrolyte. In one example, an inner focusing cylinder, and an outer focusing cylinder are used to channel the current in the electrolyte for each of the inner and outer anodes, respectively, to the inner and outer regions, respectively. The topmost portion of the focusing cylinders (an open end) creates a xe2x80x9cvirtual anode,xe2x80x9d which brings the current provided within insulative walls of the cylinders proximate to the plating surface of the work piece. The current provided by an individual (actual) anode is not only channeled to an area proximate the work piece, but also can be concentrated to a smaller area than the work surface area of the anode (smaller virtual anode than actual anode providing the current).
If focusing cylinders are used, preferably the topmost apertures of each of the inner and outer focusing cylinders are between about 0.5 and 1.5 inches from the surface of the wafer during electroplating, more preferably about 1 inch from the surface of the wafer during electroplating. Preferably the distance between the topmost portion of the inner focusing cylinder and the wafer is between about four and ten times the thickness of the inner focusing cylinder walls. Preferably the walls of at least the inner focusing cylinder are between about 0.1 and 0.4 inches thick, more preferably between about 0.1 and 0.25 inches thick.
Current shielding elements are also used in some methods of the invention to enhance plating uniformity. In some methods, preferably a circumferential edge portion of the seed layer is shielded from plating current during electroplating. Preferably the circumferential edge portion includes between about 1 and 10 percent of the entire surface area of the seed layer, more preferably between about 3 and 5 percent of the entire surface area of the seed layer. Preferably shielding the circumferential edge portion of the seed layer from plating current during electroplating includes use of a perforated shield to obtain a time-averaged shielding of the edge portion via relative movement between the wafer and the perforated shield.
Another aspect of the invention is a plating cell for electroplating a substantially uniform layer of a metal onto a wafer. Such apparatus may be characterized by the following features: (a) a wafer holder, configured such that the wafer or a metal seed layer thereon serves as a cathode in the plating cell, the wafer holder capable of positioning the wafer in a plating bath of the plating cell; (b) an inner anode located within the plating bath, the inner anode having a ring shape, the work surface of the inner anode having a surface area that corresponds to between about 15 and 25 percent of the platable surface area of the wafer; (c) an outer anode having a ring shape, the outer anode concentric with the inner anode, the work surface of the outer anode having a surface area that corresponds to between about 75 and 85 percent of the platable surface area of the wafer; (d) an inner focusing cylinder, between the inner and outer anodes, configured to focus a first portion of a total cell current in an electrolyte passing between the cathode and the inner anode during a plating process; (e) an outer focusing cylinder, housing the outer anode, configured to focus a second portion of the total cell current in the electrolyte passing between the cathode and the outer anode during the plating process; and (e) a circuit for independently adjusting the first and second portions of the total cell current supplied to each of the inner and outer anodes.
Focusing cylinders of the invention preferably include an insulating material that is chemically compatible with the electrolyte. For example they can be made wholly of such material or be made of a non-insulative material that is coated with an insulative material. Suitable insulating materials for the focusing cylinders include at least one of plastic, nanoporous ceramic, and glass. Preferably the walls of focusing cylinders of the invention between about 0.1 and 0.4 inches thick, more preferably between about 0.1 and 0.25 inches thick. In some examples, the walls of a vessel, such as an anode chamber, serve as an outermost focusing cylinder for an anode or anodes therein. In such cases only the inner surface of the vessel serve as a barrier element to direct current, and therefore the thickness of the vessel walls need not fall within the above parameters to fall within the scope of the invention.
The topmost portion of the inner side of the insulative walls that make up a focusing element of the invention define the outer limits of the area of a corresponding virtual anode. For example, with a focusing cylinder with only an anode therein (no other cylinders therein), the inner diameter of that focusing cylinder at its topmost portion (aperture) defines the area of the virtual anode created for the actual anode within that focusing cylinder. For example, an anode positioned between the walls of two focusing cylinders will have a corresponding ring-shaped (generally) virtual anode defined by the inner diameter of the outer cylinder and the outer diameter of the inner cylinder. Preferably the inner focusing cylinder has an inner diameter at its topmost portion of between about 4 and 5.4 inches, for a 300 mm wafer, more preferably between about 4.1 and 5 inches. Preferably the inner focusing cylinder has an inner diameter at its topmost portion of between about 2.5 and 3.6 inches, for a 200 mm wafer. Preferably the outer focusing cylinder has an inner diameter at its topmost portion of approximately the diameter of the wafer.
Preferably the work surface areas of the virtual anodes of the invention substantially correspond to the work surface of the seed layer on which metal is deposited. For example, for a plating cell of the invention having an inner and an outer virtual anode, the combined surface areas of the first and second virtual anodes is substantially equal the surface area of the seed layer on the workpiece.
Preferably, plating cells of the invention further include a shielding element configured to shield a circumferential edge portion of the wafer from plating current during electroplating. Such shielding elements include, for example, a perforated ring shield proximate to the topmost portion of the outer focusing cylinder and/or a shielding element associated with the wafer holder. Preferably such a perforated ring shield includes an outer diameter substantially equal to the outer diameter of the wafer and an inner diameter of between about 5.3 inches and 7 inches for a 200 mm wafer. For a 300 mm wafer, preferably the perforated ring shield has an outer diameter substantially equal to the outer diameter of the wafer and an inner diameter of between about 8 inches and 11.5 inches, more preferably between about 10 inches and 11 inches for a 300 mm wafer. Preferably the perforated ring shield has a shielding surface area that corresponds to between about 1 and 10 percent of the surface area of the wafer, more preferably between about 3 and 5 percent of the surface area of the wafer.
Plating cells of the invention can include flow flutes configured to distribute the electrolyte flow between the area encompassed by a focusing cylinder, and areas between concentric focusing cylinders. In some plating cells, diffuser membranes are used to create a uniform flow front in the electrolyte that impinges, for example, on the work surface of a wafer.